A wireless modem, which has a simple asynchronous serial interface, usually never knows when a host device is going to attempt to transmit a serial character. This means the modem must always be ready to receive a serial character at any given time.
A wireless modem currently operates by utilizing an on-board phase-locked loop (PLL) to multiply a low-frequency crystal to a high-frequency to allow a central processing unit (CPU) to operate. When the CPU is in a low power sleep state, the PLL can require ten or more milliseconds to allow the CPU to reach an operating state. Moreover, the PLL must be operating in order for an industry standard receive universal asynchronous receiver transmitter (UART) to function (i.e., sampling and storing serial characters). Thus, the PLL and the CPU must remain in an operating state in order to receive all of the serial characters from the host device, thus preventing the CPU from entering what is essentially a low power sleep state.
In existing serial modem products, the sleep current is approximately nine milliamps (mA) because the CPU cannot enter a low power sleep state and still adequately respond to serial characters on the serial interface. With the current configuration of wireless modems, if the CPU is allowed to enter a low power sleep state, serial characters could be missed, which is unacceptable for most products. Thus, having the CPU enter a low power sleep state is not feasible in existing serial modem products because the PLL is not capable of acquiring a stabilized frequency from an off state in order to activate the CPU in a timely fashion so that the serial modem can respond to serial characters on the serial interface. Preventing the CPU from entering a low power sleep state presents significant problems for battery powered subscriber devices attempting to optimize power consumption.
A solution implemented in existing serial modem products to allow the CPU to enter a low power sleep state is to use a high speed oscillator that is always operating. Using a high speed oscillator permits the CPU to instantly move from a low power sleep state to an operating state without any latency. Using a high speed oscillator, however, requires significantly more power to be consumed, thus defeating the purpose of battery powered subscriber devices attempting to optimize power consumption.
Another solution which might be implemented in existing serial modem products to allow the CPU to enter a low power sleep state is to use a modem control line to wake the modem up prior to sending the serial characters. Using a modem control line, however, involves special software on the host device side of the connection which is not always possible to configure. Also, some host devices may not have control lines available to implement such a solution (e.g., host interfaces which only use a three wire connection).
Thus, there exists a need which allows the CPU to enter a low power sleep state and allows the modem to consume a minimum amount of power while responding to all serial characters on the serial interface in a timely fashion.